Senior Digital Design Engineer

Company: Allegro Microsystems
Apply for the Senior Digital Design Engineer
Location: Musselburgh
Job Description:

Overview

You will lead the Edinburgh digital design team to define architectures for mixed-signal motor drive SoCs, guiding RTL, verification, DFT, and synthesis to tapeout-ready designs. You’ll shape the digital roadmap, mentor engineers, and ensure functional safety alignment with ISO 26262. This role blends hands-on technical direction with cross-functional collaboration across Marketing, Systems, and Analog Design. You’ll drive first-pass silicon success and strategic technology choices in automotive motor control.

Responsibilities

  • Own digital design project schedules for the Edinburgh team and coordinate RTL, Verification, DFT, and Synthesis workstreams for on-time tapeout-ready designs
  • Define the digital architectural roadmap for motor drivers to align with global product lines
  • Identify and address technical bottlenecks and resource gaps within the team
  • Serve as the primary digital technical contact for interactions with Marketing, Systems, and Analog Design
  • Mentor junior engineers and foster collaboration across multi-site teams
  • Partner with the verification team to define success criteria, ensure comprehensive functional coverage, and oversee Functional Safety (FuSa) compliance (ISO 26262)
  • Ensure high-quality execution and risk management across projects

Key requirements

  • 2+ years of experience leading small-to-medium design teams
  • Deep understanding of the Digital Design Workflow and high execution standards
  • 8+ years in digital design or architecture, including complex algorithmic IP and full SoC designs with CPU subsystems and interconnects (e.g., AMBA/AXI)
  • PhD or Master’s degree in Electronics or related field
  • Exceptional verbal and written communication skills for presenting roadmaps to diverse audiences
  • strong communication
  • mentoring and collaboration
  • problem-solving mindset
  • Cadence toolsets for front-end design flow (preferred)
  • experience with ISO 26262-compliant designs (ASIL B/D)
  • SoC design, CPU subsystems, interconnect fabrics (AMBA/AXI)

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Posted: September 14th, 2026