Silicon Logical Design Engineer: RTL & IP Integration

Graphcore in Bristol, UK, is seeking a Silicon Logical Design Engineer to contribute to micro-architecture specifications and RTL for Graphcore chips, working closely with the Silicon team to meet delivery objectives.

You will integrate IP and subsystems into top-level SoCs, perform synthesis and timing checks, support verification and physical design, and help maintain robust design flows. A degree in CS/Engineering and strong SystemVerilog or VHDL skills are required.

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