Senior Digital ASIC Design Lead – RTL to Tapeout

IC Resources is seeking a Senior Digital ASIC Design Engineer to contribute across the RTL and architecture spectrum, from design through tapeout and silicon bring‑up, in a growing semiconductor environment in the UK.

You will collaborate with digital, verification, analogue, physical design and system engineering teams to deliver robust solutions, using SystemVerilog/Verilog and a deep understanding of the ASIC flow.

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