Senior Java Engineer – Debug UI for Next-Gen Chip Design

Cadence Design Systems Inc. seeks a senior software engineer for the Verisium Debug Team to develop debugging software for next-generation chip designs, with a strong focus on end-user UI and usability.

You will build across the stack—from graphical user interfaces to application logic and backend algorithms/databases—working in a multinational team of experts. A BSCS or BSEE with 5+ years of relevant experience and strong C++ or Java skills is required.

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