Senior SoC Design Engineer – RTL & IP Integration

Arm is seeking an SoC design engineer to work on RTL and subsystem integration within a world-class organization. You will study incoming IPs, define microarchitecture, and produce RTL while collaborating with performance and power teams to optimize system KPIs.

The role involves reviewing architectures, driving design checks, and supporting project plans in a hybrid working environment. A strong background in digital design and Verilog/SystemVerilog is essential.

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