Overview
In this role you will design and optimize FPGA-based interfaces for accelerators, processors, and high-bandwidth networks. You’ll contribute to architecture, RTL, verification, and lab validation to enable ultra-high throughput interconnects for data-centre scale AI/HPC systems. You will collaborate with software and systems teams to deliver production-ready networking solutions. This position offers opportunities to influence end-to-end hardware and firmware integration in a fast-paced, technically rigorous environment.
Responsibilities
- Develop FPGA-based interfaces between accelerators, processors, and high-bandwidth networks
- Contribute to architecture definition, RTL implementation, verification, and lab validation
- Optimize high-speed FPGA designs for extreme throughput and efficiency
- Support customer evaluation platforms and field deployments
- Collaborate closely with software and systems teams to deliver production-ready networking solutions
Key requirements
- Strong FPGA development experience using SystemVerilog, Verilog, or VHDL
- Experience with high-speed networking or accelerator interconnects
- Understanding of PCIe, RDMA, CXL, NVLink, or similar protocols
- Experience with FPGA tool flows including synthesis, timing closure, and verification
- Familiarity with Vivado, Quartus, Questa, or VCS
- Scripting experience with Python or TCL
- Experience with Versal, Agilex, embedded processors, or device-driver level software would be advantageous
- Collaborative mindset
- Strong problem-solving abilities
- Effective communication across cross-functional teams
- HDL development (SystemVerilog/Verilog/VHDL)
- High-speed interconnect protocols (PCIe, RDMA, CXL, NVLink)
- FPGA tool chains (synthesis, timing, verification)
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