Senior FPGA Engineer: Low-Latency, SoC & Verilog Design

Company: DRW
Apply for the Senior FPGA Engineer: Low-Latency, SoC & Verilog Design
Location: London
Job Description:

DRW is seeking an Experienced FPGA Engineer to join our London trading team. You will build low-latency FPGA applications, bridging software and hardware to exploit market opportunities.

The role requires leadership from system design to production, RTL/Verilog development, timing closure, and close collaboration with software, trading and hardware groups. A strong background in FPGA design flow, SOC memories, and TCP/IP is essential.

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Posted: September 27th, 2026