Principal ASIC Design Engineer

Overview

In this role you will drive front-end IC design activities for next-generation silicon within a small, highly collaborative ASIC team in Cambridge. You will own architecture-to-implementation across the silicon lifecycle and collaborate with software to ensure hardware/software integration. You’ll tackle timing, power, and physical design challenges while supporting pre-silicon validation and tape-out readiness. This is a high-impact, autonomous role that contributes directly to innovative silicon products and advanced silicon platforms in a growth-focused environment.

Pay / Benefits

• fantastic compensation package
• non-monetary benefits
• onsite role in Cambridge

Responsibilities

• Take ownership of front-end development from specification through design, verification, and implementation
• Define, specify, configure, and integrate IP and system-level functionality
• Drive verification planning and execution across complex SoC and MCU designs
• Collaborate with software teams to ensure hardware/software integration
• Support FPGA platforms used for software development and pre-silicon validation
• Work with implementation teams to resolve timing, power, and physical design challenges
• Contribute across the wider ASIC development flow to ensure successful product delivery

Key requirements

• 10+ years’ experience in SoC or MCU architecture and design
• Proven experience delivering at least one silicon tape-out with architectural ownership
• Deep understanding of MCU/processor architectures, real-time operation, and deterministic interrupt handling
• Knowledge of low-power architectures, flash and SRAM hierarchies
• Experience with common interfaces (SPI, I2C, UART, USB, ADC/DAC, timers, programmable I/O)
• Strong knowledge of SoC interconnects (AXI, AHB, APB), cache hierarchies, DMA/memory controllers, security architectures
• Integration of OS-class subsystems with real-time domains
• RTL design (SystemVerilog) and verification methods (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis
• Familiarity with scripting languages (Bash, Python, Tcl)
• Experience with pre/post-silicon sign-off and physical design constraints
• On-site Cambridge, full-time onsite attendance

• autonomy
• collaboration
• ownership
• SoC/MCU architecture and design
• Front-end development
• IP specification and integration

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