Staff ASIC Design Engineer

Overview

As a Staff GPU Hardware Design Engineer, you will lead the design, debugging, and optimization of complex silicon blocks to deliver top-tier performance, power efficiency, and reliability. You join a skilled team driving GPU development for next-generation mobile, smart, and connected devices. You’ll own design work, influence architecture, and help elevate technical excellence across projects. This role offers the chance to shape foundational GPU IP and work at the forefront of silicon innovation.

Pay / Benefits

• competitive base salary
• bonus scheme

Responsibilities

• Collaborate with design, verification, and validation teams to deliver silicon solutions
• Define and document micro-architecture specifications and execution plans
• Analyse and optimise designs for trade-offs in frequency, area, power, and performance
• Participate in design reviews with constructive, technically sound feedback
• Maintain and improve the design environment, debugging and resolving issues
• Plan, schedule, and deliver work packages to deadlines
• Stay current with new tools, methodologies, and best practices in silicon design
• Mentor graduate engineers and early-career colleagues to support their growth

Key requirements

• Strong knowledge of digital IC design techniques and methodologies
• Hands-on experience with RTL design at IP or SoC level using SystemVerilog
• Proven ability to optimise designs across performance, power, and area constraints
• Experience with ASIC or FPGA design tools and environments
• Exposure to formal verification or proof methodologies to capture and validate design intent
• Knowledge of CPU, DSP, or FPU architectures, including debug and test strategies
• Proficiency in C, SystemC, C++, Python, Perl, or TCL
• Understanding of verification requirements derived from architectural and functional specifications
• Experience with GPU or CPU design methodologies, including UVM

• Collaborative mindset
• Mentoring and technical leadership
• Clear, constructive communication and feedback
• SystemVerilog RTL design
• ASIC/FPGA design tools and environments
• Formal verification or proof methodologies

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