CPU Physical Design Engineer

Overview

In this role you will drive the physical design of advanced CPU cores within a world-class engineering team. You will own key PD activities from synthesis through sign-off and collaborate with RTL, architecture and STA to optimize performance, power and area on leading process nodes. You’ll contribute to automation and methodologies to raise efficiency and PPA outcomes, while addressing timing, power, and layout challenges on demanding silicon projects. This is a hands-on, impact-driven position that puts you at the core of innovative CPU technology and tight schedules.

Responsibilities

• Drive physical implementation from synthesis to sign-off
• Own floorplanning, power planning, placement, clock tree synthesis, routing and physical verification
• Collaborate with RTL, architecture, STA and methodology teams to optimise performance, power and area
• Analyse and resolve timing, congestion, power and DRC/LVS issues throughout the flow
• Develop and enhance automation and flows using TCL, Python or Perl
• Support design closure across advanced process technologies and contribute to best practices
• Collaborate with cross-functional teams to deliver high-quality silicon on aggressive project schedules

Key requirements

• Degree in Electrical/Electronic Engineering, Computer Engineering or related discipline
• Strong hands-on PD experience for complex ASIC/CPU/SoC designs
• Experience across full implementation flow: floorplanning, place and route, CTS, physical sign-off
• Familiarity with Innovus, ICC2, Fusion Compiler or equivalent
• Good understanding of timing closure, power optimisation and physical verification methodologies
• Strong scripting skills in TCL, Python or Perl

• Cross-functional collaboration
• Problem-solving mindset
• Proactive automation mindset
• Physical Design for ASIC/CPU/SoC
• Floorplanning
• Place & Route

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