Overview
In this role you will help establish a greenfield FPGA function for latency‑critical trading systems. You will own architecture, implementation and testing of high‑performance FPGA platforms, collaborating with software and ASIC teams to extend and deliver scalable, low‑latency solutions. You’ll work on large FPGAs with fast interfaces and deep pipelines, shaping both hardware and verification methodologies. This is an opportunity to make a measurable impact through innovative, hardware‑aware design with end‑to‑end ownership.
Responsibilities
- Design high-performance, resource-efficient FPGA architectures
- Work on projects involving high-speed interfaces (PCIe, Ethernet, etc.) and external memory
- Translate high-level functional specs into structured RTL with synthesis in mind
- Collaborate with ASIC and software teams on integrated platform development
- Contribute to internal tooling and methodology refinement
- Build testbenches and validation flows (Cocotb, Verilator); apply formal methods where needed
Key requirements
- Deep experience in Verilog or SystemVerilog
- Strong understanding of FPGA internals and hardware structuring
- Experience on large-scale designs (high throughput, multiple clock domains, deep pipelines)
- Familiar with high-speed serial interfaces (Ethernet, USB 3.1, Fibre Channel)
- Practical experience balancing timing closure, area, and power trade-offs
- Familiarity with test and verification methodologies (Cocotb preferred)
- collaboration
- ownership
- agile mindset
- Verilog/SystemVerilog
- FPGA architecture and timing optimization
- PCIe, Ethernet, USB 3.1, Fibre Channel interfaces
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