Senior Staff Analog Design and Modelling Engineer

Overview

In this senior role, you will lead analog and mixed-signal design efforts to enable next-gen quantum computing hardware. You’ll drive end-to-end design flows from specifications through tape-out and silicon validation, while owning top-level chip integration and CMOS modelling. You will bridge theory, simulation, and real hardware in a fast-paced, frontier technology environment. This position offers hybrid work and a compelling package, including stock rewards. You’ll work with cross-functional teams to push the limits of performance and reliability in quantum-grade systems.

Pay / Benefits

• hybrid working model
• competitive basic salary
• bonus plan
• stock unit scheme

Responsibilities

• Lead complete design flow for analog and mixed-signal blocks from spec to tape-out and silicon validation
• Own top-level chip integration and modelling as part of the CMOS development flow
• Design amplifiers and precision filters with strong mixed-signal expertise (ADCs/DACs)
• Model using SystemVerilog, MATLAB or Python/NumPy and automate model generation, checking and regression
• Bridge theory, simulation and real-world hardware to deliver high-performance designs
• Contribute to multiple tape-outs and ongoing frontier technology projects
• Collaborate with cross-functional teams across research and development

Key requirements

• Extensive experience in analog IC design with a track record of high-performance results in fast-paced environments
• Demonstrated ability to deliver multiple tape-outs
• Proficiency in designing amplifiers and precision filters; strong mixed-signal expertise (ADCs/DACs)
• Experience with modelling using SystemVerilog, MATLAB or Python/NumPy and scripting for automation
• Ability to bridge theory, simulation and hardware in CMOS development flow

• problem solving in complex environments
• strong collaboration and communication with cross-functional teams
• self-motivated and able to manage multiple priorities
• Analog IC design
• Mixed-signal design (ADCs/DACs)
• SystemVerilog modelling

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