Principal Engineer, DFT

Company: ARM
Apply for the Principal Engineer, DFT
Location: Cambridge
Job Description:

Overview

In this role you define DFT architecture for next-generation Arm IPs and SoCs, enabling scalable test across diverse architectures. You will drive reusable DFT methodologies and collaborate with architecture, implementation, verification, and PD teams, plus engage with EDA vendors and customers. Your work shapes future products and industry standards while mentoring engineers and contributing to technical publications. The role combines high impact across Arm and the wider semiconductor ecosystem, with a focus on AI, hyperscale computing, and multi-die designs.

Pay / Benefits

  • relocation package with visa sponsorship
  • hybrid working model
  • accommodations during recruitment
  • equal opportunities employer

Responsibilities

  • Define DFT architecture for next-generation Arm IPs and SoCs, including AI and hyperscale products
  • Develop and drive scalable DFT methodologies and implementation flows across multiple Arm teams
  • Evaluate emerging DFT technologies and lead investigations for future product challenges
  • Collaborate with architecture, implementation, verification, and physical design teams to define robust DFT solutions
  • Work with EDA vendors to influence roadmaps, assess new capabilities, and drive adoption
  • Produce architecture specifications, methodology documentation, and deployment guidance
  • Provide technical leadership and mentorship across project teams
  • Support strategic engagements with customers, ASIC partners and industry bodies; contribute to publications and standards

Key requirements

  • Principal or Senior Principal with extensive DFT architecture and implementation experience
  • Strong understanding of modern SoC DFT methodologies: scan architecture and compression, ATPG, fault simulation, at-speed testing, Memory/BIST, Logic BIST, JTAG/IEEE 1149.1, IJTAG/IEEE 1687, DFT verification and debug
  • Experience delivering reusable DFT methodologies or automation
  • Experience evaluating and deploying Siemens Tessent, Synopsys and/or Cadence DFT solutions
  • Strong scripting (Perl, Tcl, Python) and Linux/Unix skills
  • Excellent problem-solving, analytical, and communication abilities
  • Degree (or equivalent) in Electronic Engineering, Computer Engineering or related discipline
  • strong communication and influence across engineering teams
  • technical leadership and mentorship
  • collaboration across multiple disciplines
  • DFT architecture and implementation
  • Scan architecture and scan compression
  • ATPG and fault simulation

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Posted: October 1st, 2026