Senior Design Verification Engineer

Overview

Join a world-class silicon engineering group shaping the AI compute era. You will lead verification efforts across CPU/ASIC projects, collaborating with cross-functional teams to diagnose deep issues and verify complex hardware/software interactions. You’ll help plan, specify, and close functional coverage while feeding feedback to architects and expanding shared verification infrastructure. This is a hands-on role with broad tooling and language use, offering impact on scalable AI-focused hardware platforms. You’ll work in a high-performance, cross-site environment focused on delivering reliable, state-of-the-art AI solutions.

Pay / Benefits

• flexible working
• generous annual leave
• private medical insurance and health cash plan
• dental plan
• pension (matched up to 5%)
• life assurance and income protection

Responsibilities

• Verification activities within the verification team
• Ensuring good communication between sites
• Verification planning, specification and closure of functional coverage
• Providing feedback to architects
• Test generation and failure diagnosis/triage
• Contributing to shared verification infrastructure

Key requirements

• 10+ years of Verification experience
• Verification experience in relevant industry
• Proven leadership and planning skills
• Ability to work across teams and programming languages to find root causes of deep and complex issues
• Experience of the verification process applied in CPU and/or ASIC environments
• SystemVerilog
• Python
• C++
• Linux
• UVM
• SVA
• LLVM
• GCC
• SGE or other DRMS
• XML and XPath/XSLT

• leadership
• cross-team collaboration
• problem-solving
• SystemVerilog
• Python
• C++

…