Overview
In this role you will contribute to the specification, design and verification of Arm-based SoCs. You’ll join a collaborative team across Manchester and Sheffield, driving next-generation compute solutions. You’ll tackle IP integration, micro-architecture and RTL work while partnering with verification and backend teams to ensure delivery. The role combines hands-on design with process improvement and cross-group collaboration to shape future Arm devices.
Pay / Benefits
- hybrid working
- accommodation support during recruitment
- equal opportunity employer
Responsibilities
- Integrate complex IP such as CPU clusters, PCIe, DDR and other High-Speed IO into SoCs
- Write micro-architecture specs, develop RTL, fix bugs, and perform design checks
- Collaborate with verification to analyze test plans and debug issues
- Support backend activities including floor planning, constraints, and timing closure
- Contribute to design methodologies and improve design quality metrics and inspections
- Mentor and guide team members to ensure project success
- Assist Project Management with activities, plans and schedules
Key requirements
- Experience crafting subsystems for PCIe, DDR/LPDDR, HBM, UCIe, Ethernet
- RTL design for sophisticated SoC development using Verilog and/or SystemVerilog
- Proficiency in static design checks (Lint/CDC/RDC), synthesis, timing analysis, power management, and clock domain crossing
- Exposure to all design stages from concept to testing and documentation
- Produce specifications and documentation for complex designs
- Knowledge of shell scripting (Tcl, Perl, Python)
- team collaboration
- problem-solving
- mentoring teammates
- Verilog
- SystemVerilog
- static design checks (Lint/CDC/RDC)
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