Postdoc: Edge Vision Processor Architect (FPGA/RTL)

The University of Manchester invites applications for a Post-Doctoral Research Associate to lead the design of next-generation vision processor hardware, with a focus on near-sensor integration for advanced edge computing scenarios.

The role covers RTL-level design using Verilog/SystemVerilog or VHDL, with FPGA implementations and potential ASIC work, plus system modelling and hardware-software co-design and sensor interfacing.

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