Lead Ultra-Low Latency C++/FPGA Engineer

JPMorgan Chase & Co. in London seeks an Ultra Low Latency Lead Software Engineer to design, build, and operate market gateway solutions with FPGA acceleration, delivering deterministic performance for high-speed trading.

You will collaborate with hardware and software teams, drive latency optimization, implement end-to-end pipelines, and lead development across Unix/Linux environments, CI/CD, and secure engineering practices to support global markets.

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