About the position
We are looking to hire engineers with experiencein both software and hardware design to help usbuild our FPGA or ASIC-based applications.
We’re big believers in the ability of toolsto make programming faster, more pleasant, andmore reliable. We apply these same principles toour hardware Engineering work, and we’re lookingfor people who are interested in using programminglanguage technology to improve the process ofdesigning, testing, and validating hardwaredesigns. The hardware team at Jane Street works onboth FPGA and ASIC designs. We use Hardcaml, anOCaml library for succinctly describing hardwarein RTL. Hardcaml is tightly integrated into ourdevelopment environment, so you’ll also gain lotsof exposure to the libraries and tools that arefoundational to our internal systems. No previousknowledge of Hardcaml is required.
In this role, you’ll work on the ground-updesign and implementation of new FPGA or ASICapplications, and help extend and refine thehigh-level design and testing tools that we useinternally. Your day-to-day work willpredominantly involve OCaml & Hardcaml, forboth RTL design and testing/integration, but youcan also expect to work with some Verilog and C.While you don’t need to have worked with OCamlspecifically, a good background in typedprogramming languages is a plus.
If you’d like to learn more, you can read aboutour interview process, meet some of our newesthires, or check out our OCaml All The Way Downtalk and Programmable Hardware podcastepisode.
About you
We don’t expect you to have a background inOCaml, finance, or any other specific field—we’relooking for smart programmers who will approachhardware design with a software engineeringmindset. We’re more interested in how you thinkand learn than what you currently know. You shouldbe:
- Comfortable with a software programminglanguage
- Experienced with a Hardware Description(or Construction) language (VHDL, Verilog, Chisel,Pymtl, or other), for both writing and testinghardware designs
- Experienced working with FPGA or ASICvendor tools – Vivado or Quartus for FPGAs, Genusor Innovus for ASICs
- Experienced with building a workinghardware project (either FPGA or ASIC) through anacademic, professional, or personal project
- Interested in learning how to use FPGAsor ASICs in the context of networking
- A top-notch programmer with a love fortechnology
- Intellectually curious, collaborative,and eager to learn
- Humble and unafraid to ask questions andadmit mistakes
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