Principal SoC Physical Design Architect – Tape-Out Leader

Aion Silicon Ltd is seeking a Principal Engineer for SoC Physical Design or Chip-Level Expert to lead ASIC/SoC implementation from architecture to tape-out. You will drive full-chip physical design, floorplanning, clocking, place-and-route, and signoff while coordinating with Architecture, RTL, Verification, DFT, STA, and Packaging teams.

This hands-on leader will set methodologies, champion BKMs, define milestones, manage dependencies, and mentor engineers across distributed teams.

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